1. Field of the Invention
This invention relates to a semiconductor device and a method for manufacturing a partial SOI (silicon on insulator) substrate.
2. Description of the Related Art
Since the DRAM provided with memory cells each comprising one MOSFET and one capacitor is suited for high integration, the DRAM is employed in various products as a low cost memory of large capacity. In recent years in particular, there is an increasing demand for the development of a system LSI wherein logic and the DRAM are integrated in the same semiconductor chip to enhance the system performance. On the other hand, the SOI MOSFET where the semiconductor elements thereof are disposed not on the conventional silicon substrate but on a thin film SOI substrate is now highlighted in the art as it is capable of enhancing the performance of a logic circuit which is mainly constituted by MOSFET, and the application of this SOI MOSFET to products with high performance logic has already been started. Under this trend, it is now urgently needed to develop a system LSI where the DRAM is mixedly mounted on a high performance logic chip based on the SOI.
However, since the SOI MOSFET is constructed such that in the ordinary employment thereof, the electric potential of the body region where channel is to be formed floats, the following problems are caused. Namely, due to so-called substrate-floating effects, leak current or fluctuations of characteristics including fluctuations of threshold value are caused to generate in concomitant with the operation of circuit. Therefore, the SOI MOSFET has been considered unsuitable for use in a circuit where the level of leak current, the scattering of threshold value, noise, etc. are required to be severely controlled, for example for use in the cell transistor of DRAM or the circuit of sense amplifier. If the problems of the substrate-floating is to be fundamentally solved, it is required to provide the MOSFET with a leader element region drawn out of the body portion and with a contact to control the potential of the body region. In this case however, there is a problem that the area of cells as well as the area of sense amplifier portion are caused to increase considerably, so that the most important characteristics of DRAM, i.e. the capability thereof to realize high integration would be deteriorated.
With a view to overcoming the aforementioned problems, there have been proposed various methods, each of which is mainly featured in that a non-SOI region is allocated to the surface of an SOI substrate (partial SOI), so that a circuit portion which is incompatible with the effects of substrate-floating is enabled to be formed in the non-SOI region. One of the methods is shown in FIGS. 1A to 1C, which is featured in that oxygen ions are implanted into only a portion of a silicon substrate, which is then heat-treated to form a partially buried oxide film. Specifically, first of all, as shown in FIG. 1A, a thermal oxide film mask 2 is formed on a predetermined region of the surface of the silicon substrate 1. Then, as shown in FIG. 1B, oxygen ion 3 is implanted through the thermal oxide film mask 2 into the silicon substrate 1. Thereafter, the resultant silicon substrate 1 is subjected to heat treatment to form a buried oxide film 4 in the SOI region “B” of the silicon substrate 1 as shown in FIG. 1C.
However, the aforementioned method is accompanied with several problems as shown in FIG. 1C. Since there is a difference in thermal expansion coefficient between the buried oxide film 4 and the silicon substrate 1, crystal defects 12 are caused to generate in the non-SOI region “A” due to the expansion of the buried oxide film 4. Therefore, the quality of the non-SOI region “A” is not sufficiently high enough to enable a semiconductor element to be formed therein. Further, a step portion 11 is caused to generate at a boundary portion between the SOI region “B” and the non-SOI region “A”, thus necessitating an additional process to eliminate this step portion 11 to flatten the surface of the silicon substrate 1.